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Chapter 7: Enabling and Using HART on the 1769sc-IF4IH0
User's Manual 0300215-03 Rev. A
7-7
Table 7-3 (HART Packet 2)
Tag Name
Data Type
Style
Description
If4ih0Packet2 Packet2[4,1] NA Two dimensional array containing packet
2 data for all 4 channels.
If4ih0Packet2[X,0]
1
Packet2 NA Packet 2 data for channel X
If4ih0Packet2[X,0].HartChannelID INT BIN Bits 0 to 3: Channel number (0 – 3).
Bit 4: Searching/Initializing HART device
Bit 5: HART communication failure or
device not found
Bit 6: Pass-through message pending (ready)
Bit 7: Unused (0)
Bits 8 to 10: Packet ID
Bit 11 through 15: Unused
If4ih0Packet2[X,0].Slot0Data REAL Float
Variable for slot 0
If4ih0Packet2[X,0].Slot1Data REAL Float
Variable for slot 1
If4ih0Packet2[X,0].Slot2Data REAL Float
Variable for slot 2
If4ih0Packet2[X,0].Slot3Data REAL Float
Variable for slot 3
If4ih0Packet2[X,0].Slot0Units SINT DEC
Slot 0 units code
If4ih0Packet2[X,0].Slot1Units SINT DEC
Slot 1 units code
If4ih0Packet2[X,0].Slot2Units SINT DEC
Slot 2 units code
If4ih0Packet2[X,0].Slot3Units SINT DEC
Slot 3 units code
If4ih0Packet2[X,0].Slot0Assignment SINT DEC
Slot 0 variable code
If4ih0Packet2[X,0].Slot1Assignment SINT DEC
Slot 1 variable code
If4ih0Packet2[X,0].Slot2Assignment SINT DEC
Slot 2 variable code
If4ih0Packet2[X,0].Slot3Assignment SINT DEC
Slot 3 variable code
If4ih0Packet2[X,0].Pad SINT[12] DEC
Packet pad
1
X represent s the mo dule channel number (0 t o 3 )
Table 7-4 (HART Packet 3)
Tag Name
Data Type
Style
Description
If4ih0Packet3 Packet3[4,1] NA Two dimensional array containing packet
3 data for all 4 channels.
If4ih0Packet3[X,0]
1
Packet3 NA Packet 3 data for channel X
If4ih0Packet3[X,0].HartChannelID INT BIN Bits 0 to 3: Channel number (0 – 3).
Bit 4: Searching/Initializing HART device
Bit 5: HART communication failure or
device not found
Bit 6: Pass-through message pending (ready)
Bit 7: Unused (0)
Bits 8 to 10: Packet ID
Bit 11 through 15: Unused
If4ih0Packet3[X,0].Message SINT[32] ASCII
32 character message
If4ih0Packet3[X,0].Pad SINT[4] DEC
Pad 32 bit alignment.
1
X represent s the module ch ann el n umber (0 t o 3)
- Compact™ I/O 1
- Isolated HART 1
- Analog Module 1
- Table of Contents 3
- Preface 7
- Conventions 8
- Used in This 8
- Chapter 1 9
- Module Overview 9
- Do No t Remov e RTB Un der 10
- Power Unless Area is Non 10
- Hazardous 10
- Section 1.5 11
- System 11
- Overview 11
- 1.5.1 System Operation 11
- Section 1.6 12
- Module 12
- Operation 12
- Chapter 2 13
- Quick Start for Experienced 13
- Chapter 3 19
- Installation and Wiring 19
- 3.3.3 Remove Power 21
- 3.3.4 Selecting a Location 21
- Section 3.4 22
- System Assembly 22
- Section 3.5 23
- Mounting 23
- 3.5.1 Minimum Spacing 23
- 3.5.2 Panel Mounting 23
- 3.5.3 DIN Rail Mounting 24
- 3.7.2 Terminal Door Label 26
- 3.7.5 Wiring the Module 27
- 3.7.6 Wiring Diagram 28
- 3.7.7 Calibration 28
- Chapter 4 29
- Configuring the IF4IH for 29
- CompactLogix Using 29
- RSLogix 5000 29
- Section 4.2 33
- The Add-On 33
- Profile 33
- Section 4.4 36
- Project Tags 36
- Project 38
- Chapter 5 41
- Configuring the IF4IH for a 41
- MicroLogix 1500 Using 41
- RSLogix 500 41
- Section 5.2 42
- Configuring 42
- 1500 System 42
- Section 5.3 46
- Using the 46
- Ladder Sample 46
- Chapter 6 51
- Module Data, Status, and 51
- Channel Configuration 51
- Section 6.4 55
- Configuration 55
- Raw/Proportional Data 62
- Engineering Units 62
- Scaled-for-PID 62
- Percent Range 62
- 6.4.9 Channel X 64
- 6.4.10 Channel X 64
- 6.5.8 Reserved (Words 24…45) 66
- Section 6.6 67
- Determining 67
- Effective 67
- Resolution 67
- Section 6.7 68
- Update Time 68
- Chapter 7 69
- Enabling and Using HART on 69
- Table 7-1 (HART Packet 0) 73
- Table 7-2 (HART Packet 1) 74
- Figure 7-4 (Packet Ladder) 77
- 7.2.3 Packet Interval 78
- Section 7.3 79
- Sending 79
- Messages 79
- 7.3.3 Processing a Message 81
- Figure 7-6 Sending Message 82
- Figure 7-8a (Message Ladder) 84
- Figure 7-8b 85
- Figure 7-8c 86
- Figure 7-8d 87
- Figure 7-8e 88
- Figure 7-8f 89
- Figure 7-8g 90
- Figure 7-8h 91
- Figure 7-8i 92
- Figure 7-8j 93
- Figure 7-8m 95
- Figure 7-8n 96
- Figure 7-8o 97
- Section 7.4 98
- Module Specific 98
- Commands 98
- Attention 103
- Figure 7-10b 107
- Figure 7-10c 108
- Figure 7-10d 109
- Figure 7-10e 110
- Section 7.5 111
- HART Protocol 111
- 7.5.1 Message Format 111
- Chapter 8 117
- Programming Examples 117
- Figure 8-4b 121
- 8.2.1 MAIN Routine 123
- 8.2.2 PACKETS Routine 124
- Figure 8-6b 125
- Figure 8-6c 126
- 8.2.3 MSG_TO_MOD Routine 127
- Figure 8-7b 128
- Figure 8-7c 129
- Figure 8-7d 130
- Figure 8-7e 131
- Figure 8-7f 132
- Figure 8-7g 133
- Figure 8-7h 134
- Figure 8-7i 135
- Figure 8-7j 136
- Figure 8-7k 137
- Figure 8-7l 138
- Figure 8-7m 139
- Figure 8-7n 140
- Figure 8-7o 141
- Figure 8-7p 142
- Figure 8-7q 143
- 8.2.4 SRC_CHECK Routine 144
- Figure 8-8b 145
- 8.2.5 DEST_CHECKSUM Routine 146
- Figure 8-9b 147
- 8.2.6 HART_MSG Routine 148
- Figure 8-10b 149
- Figure 8-10c 150
- Figure 8-10d 151
- Figure 8-10e 152
- Figure 8-10f 153
- Figure 8-10g 154
- Figure 8-10h 155
- Figure 8-10i 156
- Figure 8-10j 157
- Figure 8-10k 158
- 8.2.7 WORD_BYTE Routine 159
- Figure 8-11b 160
- Figure 8-11c 161
- 8.2.8 HART_CHECK Routine 162
- Figure 8-12b 163
- 8.2.9 BYTE_WORD Routine 164
- Figure 8-13b 165
- Chapter 9 167
- Diagnostics and 167
- Troubleshooting 167
- 1514131211109876543210 169
- 0000000000000000 169
- Value Bits 11 170
- Description 170
- Section 9.8 171
- Inhibit Function 171
- Appendix A 173
- Module Specifications 173
- Section A.2 174
- Environmental 174
- Specifications 174
- Appendix B 177
- HART Universal and Common 177
- Practice Commands 177
- Wire Size · 3-9 183
- Wiring Diagram · 3-10 183
- Wiring Guidlines · 2-3 183
- Getting Technical 185
- Assistance 185
- Declaration of 185
- Conformity 185
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